Research Bits: Feb. 17
Analog layout foundation model; carbon nanotube sandpaper; low-power optical amplifier. The post Research Bits: Feb. 17 appeared first on Semiconductor Engineering.
Analog layout foundation model
Researchers from Pohang University of Science and Technology (POSTECH) built a foundation model for automated analog circuit layout.
The team used a self-supervised learning approach, in which the model learns without human-provided labels. To counter a lack of available training data, the team divided analog layouts into small patches, masked part of each layout, and trained the model to predict the missing layout elements. This enabled the researchers to generate about 320,000 training samples from six real layout datasets.
After pre-training, the model learned common structures in analog layouts. With limited data, it was adapted to five layout-related tasks: contact and via generation, dummy pattern insertion, N-well generation, and metal routing. Experiments showed 96.6% of layouts passed design-rule checking and layout versus schematic verification. The team achieved comparable performance with one-eighth of the data required by conventional methods.
“The main contribution of this work is the methodology that enables large-scale learning,” said Sungyu Jeong, a Ph.D. candidate at POSTECH, in a statement. “Our goal is to collect more data and continue developing the foundation model to a practically usable level.” [1]
Carbon nanotube sandpaper
Researchers from the Korea Advanced Institute of Science and Technology (KAIST) developed a carbon nanotube “sandpaper” for semiconductor planarization.
Proposed as an alternative to chemical mechanical polishing (CMP), in which abrasive particles are dispersed in liquid, the method uses vertically aligned carbon nanotubes fixed in polyurethane and partially exposed on the surface. The structure suppresses abrasive detachment and maintains stable performance after repeated use.
The nanotube sandpaper creates an extremely dense structure of abrasive particles, making it capable of nanometer-scale precision. In semiconductor pattern planarization experiments, the technique reduced dishing defects, in which the center of the interconnect lines becomes recessed with potential impacts to performance and reliability, by up to 67% compared with conventional CMP processes. It also does not require a continuous supply of slurry solutions, reducing cleaning steps and eliminating waste.
“This is an original study demonstrating that the everyday concept of sandpaper can be extended to the nanoscale and applied to ultra-fine semiconductor manufacturing,” said Sanha Kim, a professor in the Department of Mechanical Engineering at KAIST, in a press release. “We hope this technology will lead not only to improved semiconductor performance but also to environmentally friendly manufacturing processes.” [2]
Low-power optical amplifier
Researchers from Stanford University built a chip-sized optical amplifier that achieves about 100 times amplification while only using a couple of hundred milliwatts of power by recycling the energy used to power it through a resonant design.
The optical amplifier is powered by the energy stored in a light beam acting as a type of “pump,” and its performance depends on the intensity of that light beam. In this amplifier, the pump light is generated inside a resonator. It travels in a circular loop like a racetrack and builds to higher intensities to better boost the desired beam.
“By recycling the energy of the pump that powers this amplifier, we made it more efficient, and this doesn’t come at a cost to its other properties,” said Devin Dean, a doctoral student at Stanford, in a press release. Dean noted that because of its small size and lower energy requirements, the optical amplifier could be powered by a battery and used in a smartphone. “They could be used potentially for data communications, biosensing, making new light sources, or a host of different things.” [3]
References
[1] S. Jeong, W. J. Choi, J. Choi, A. Biswas and B. Kim, “A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 73, no. 2, pp. 1220-1230, Feb. 2026. https://doi.org/10.1109/TCSI.2025.3615646
[2] S. Kang, Jh. Jeong, H.J. Ryu, et al. Carbon nanotube sandpaper for atomic-precision surface finishing. Adv Compos Hybrid Mater 9, 44 (2026). https://doi.org/10.1007/s42114-025-01608-3
[3] D.J. Dean, T. Park, H.S. Stokowski, et al. Low-power integrated optical amplification through second-harmonic resonance. Nature 649, 1159–1164 (2026). https://doi.org/10.1038/s41586-025-09959-z
The post Research Bits: Feb. 17 appeared first on Semiconductor Engineering.
Researchers from Pohang University of Science and Technology (POSTECH) built a foundation model for automated analog circuit layout.
The team used a self-supervised learning approach, in which the model learns without human-provided labels. To counter a lack of available training data, the team divided analog layouts into small patches, masked part of each layout, and trained the model to predict the missing layout elements. This enabled the researchers to generate about 320,000 training samples from six real layout datasets.
After pre-training, the model learned common structures in analog layouts. With limited data, it was adapted to five layout-related tasks: contact and via generation, dummy pattern insertion, N-well generation, and metal routing. Experiments showed 96.6% of layouts passed design-rule checking and layout versus schematic verification. The team achieved comparable performance with one-eighth of the data required by conventional methods.
“The main contribution of this work is the methodology that enables large-scale learning,” said Sungyu Jeong, a Ph.D. candidate at POSTECH, in a statement. “Our goal is to collect more data and continue developing the foundation model to a practically usable level.” [1]
Carbon nanotube sandpaper
Researchers from the Korea Advanced Institute of Science and Technology (KAIST) developed a carbon nanotube “sandpaper” for semiconductor planarization.
Proposed as an alternative to chemical mechanical polishing (CMP), in which abrasive particles are dispersed in liquid, the method uses vertically aligned carbon nanotubes fixed in polyurethane and partially exposed on the surface. The structure suppresses abrasive detachment and maintains stable performance after repeated use.
The nanotube sandpaper creates an extremely dense structure of abrasive particles, making it capable of nanometer-scale precision. In semiconductor pattern planarization experiments, the technique reduced dishing defects, in which the center of the interconnect lines becomes recessed with potential impacts to performance and reliability, by up to 67% compared with conventional CMP processes. It also does not require a continuous supply of slurry solutions, reducing cleaning steps and eliminating waste.
“This is an original study demonstrating that the everyday concept of sandpaper can be extended to the nanoscale and applied to ultra-fine semiconductor manufacturing,” said Sanha Kim, a professor in the Department of Mechanical Engineering at KAIST, in a press release. “We hope this technology will lead not only to improved semiconductor performance but also to environmentally friendly manufacturing processes.” [2]
Low-power optical amplifier
Researchers from Stanford University built a chip-sized optical amplifier that achieves about 100 times amplification while only using a couple of hundred milliwatts of power by recycling the energy used to power it through a resonant design.
The optical amplifier is powered by the energy stored in a light beam acting as a type of “pump,” and its performance depends on the intensity of that light beam. In this amplifier, the pump light is generated inside a resonator. It travels in a circular loop like a racetrack and builds to higher intensities to better boost the desired beam.
“By recycling the energy of the pump that powers this amplifier, we made it more efficient, and this doesn’t come at a cost to its other properties,” said Devin Dean, a doctoral student at Stanford, in a press release. Dean noted that because of its small size and lower energy requirements, the optical amplifier could be powered by a battery and used in a smartphone. “They could be used potentially for data communications, biosensing, making new light sources, or a host of different things.” [3]
References
[1] S. Jeong, W. J. Choi, J. Choi, A. Biswas and B. Kim, “A Self-Supervised Learning of a Foundation Model for Analog Layout Design Automation,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 73, no. 2, pp. 1220-1230, Feb. 2026. https://doi.org/10.1109/TCSI.2025.3615646
[2] S. Kang, Jh. Jeong, H.J. Ryu, et al. Carbon nanotube sandpaper for atomic-precision surface finishing. Adv Compos Hybrid Mater 9, 44 (2026). https://doi.org/10.1007/s42114-025-01608-3
[3] D.J. Dean, T. Park, H.S. Stokowski, et al. Low-power integrated optical amplification through second-harmonic resonance. Nature 649, 1159–1164 (2026). https://doi.org/10.1038/s41586-025-09959-z
The post Research Bits: Feb. 17 appeared first on Semiconductor Engineering.